Right now it's easy for the bus sniffers to fall behind because the current terminal transmit function is blocking (waits until it can send the bytes) and sniffed bytes can be missed. A better solution is to buffer the terminal output and periodically check the TX UART to see if more bytes can be copied. Basically a cooperative multitasking setup.

Wouldn't it be possible to add RX/TX-FIFOs (e.g. 128 bytes) with interrupts to handle the communication in the background? That's something I always do in my projects.

I've once written such an algorithm for a dsPIC30F.. it shouldn't be too hard to port the code to PIC24F.

But the question is wether an interrupt driven algorithm interferes with the protocols. But I think it would be possible to disable the interrupts for a short time during timing critical code because the UART module has an internal 4 byte buffer.