
openrd - issue #7
jtag_reset 0 1, jtag_reset 0 0 may not reset the board from openocd
MPP[6] on the mpu (CPU_SYS_RST#) operates push-pull instead of open-drain. On the board, this is electrically connected to the PWR_RST_3V3_JTAG. As a result, reseting the board through the jtag interface (either the ftdi based one, or the one on CONN27) may not work on some boards. It depends on the current output of MPP[6], the ability of U33 pin to sink current, and the threshold voltage U30 requires to see a the input signal as low.
- start openocd with the board configuration for openrd
- issue jtag_reset 0 1
- issue jtag_reset 0 0
It's expected that the openrd client board resets after this procedure, and that I will see the u-boot monitor start on the serial console.
Instead, nothing happened. I measured a voltage of 1.83V on PWR_RST_3V3_JTAG, which is not enough for U30 to reset the board.
It was reported to me that this procedure was repeated on a different board, the voltage on PWR_RST_3V3_JTAGe was 1.53V, and that board did reset properly.
The host operating system I used was Ubuntu Linux 9.10 (AMD64), The version of openocd used was 0.5.0-dev-00145-g2a17fd9.
I am working around this problem using a hardware modification. I am routing the output of MPP[6] into an active-low enable pin of an unused tri-state buffer that is already on the board ( U33 ).
It may also be possible to reset the board by bringing MPP[6] to a low state through boundary-scan commands issued from openocd.
Comment #1
Posted on Apr 9, 2010 by Happy RabbitEasiest workaround if your board is affected.
- sudo openocd -f board/openrd.cfg
- telnet localhost 4444 (in another terminal)
- press and hold the left reset button on the openrd
- while holding in the reset button, enter "halt" in the terminal
- release the reset button.
- type "openrd_init" in the terminal
The board is now halted in its pre u-boot state. commands like "nand probe 0" should work.
Status: New
Labels:
Type-Defect
Priority-Medium