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MemoryLayout  
Definition of the rough memory layout.
Phase-Design
Updated Mar 21, 2011 by s179309...@wehebrink.net

RAM

0x60 Global Shared Memory (valid for bootloader and all applications)

  • 0x00 - 0x00 Boot mode selection (0x00 Bootloader, 0x01 Application 0)

Flash

Overview PIC18F Memory

  • 0x0000 - 0x5FFF Bootloader
    • 0x00 PIC reset vector
    • 0x08 PIC high priority interrupt vector
    • 0x18 PIC low priority interrupt vector
  • 0x6000 - 0x177FF Application 0
    • 0x00 application reset vector
    • 0x08 application high priority interrupt vector
    • 0x18 application low priority interrupt vector

Block Organisation and Identification

The flash memory is organized in blocks of 16kByte. Each block has a fixed structure of identification and verification data. This data is:

  • <block start> + 0xc0 Hardware Identification (only for bootloader)
    • 0x00 - 0x03 Hardware Type
    • 0x04 - 0x07 Serial Number
    • 0x08 - 0x0B Production Date
    • 0x0C - 0x3F Reserved (0x00)

  • <block end> - 0x50 Software Identification 0
    • 0x00 - 0x01 Software ID
    • 0x02 - 0x05 Software Version
    • 0x06 - 0x06 Block ID
    • 0x07 - 0x07 reserved
    • 0x08 - 0x09 Block start address (in blocks of 0x100 bytes)
    • 0x0A - 0x0B Block size (in blocks of 0x100 bytes)
    • 0x0C - 0x0D End Pattern (0xCA, 0xFE)
    • 0x0E - 0x0F CRC (from <start address> with <block size> - 2)
    • 0x10 - 0x4F Programming flag page

EEProm

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