Issue 1: Compilation errors of USB TO UART project
Project Member Reported by redsou...@gmail.com, Apr 10, 2013
These are the compilation errors that compiler indicates, on the bottom of the page we have the links to the problematic verilog files.

1) Error:  /home/inf2008/soukas/Desktop/project/src/usb_test3.v:38: The symbol 'tb' is not defined. (VER-956)
                                                                            
2) Error:  /home/inf2008/soukas/Desktop/project/src/usb_test2.v:2: The construct 'compilation unit scope' is not supported in this language. (VER-720)      

3) Error:  /home/inf2008/soukas/Desktop/project/src/usb_test2.v:28: The symbol 'tb' is not defined. (VER-956) 
                                                                           
4) Error:  /home/inf2008/soukas/Desktop/project/src/usb_test1.v:2: The construct 'compilation unit scope' is not supported in this language. (VER-720) 

5) Error:  /home/inf2008/soukas/Desktop/project/src/usb_test1.v:29: The symbol 'tb' is not defined. (VER-956)

6) Error:  /home/inf2008/soukas/Desktop/project/src/usb_rx_phy.v:76: The construct 'compilation unit scope' is not supported in this language. (VER-720)


7) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:923: time declarations are not supported by synthesis. (VER-191)
8) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:924: time declarations are not supported by synthesis. (VER-191)
9) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:925: time declarations are not supported by synthesis. (VER-191)
10) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:954: case equality (===) is not supported by synthesis. (VER-189)
11) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:956: case equality (===) is not supported by synthesis. (VER-189)
12) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:979: case equality (===) is not supported by synthesis. (VER-189)
13) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:979: case equality (===) is not supported by synthesis. (VER-189)


14) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2686: case inequality (!==) is not supported by synthesis. (VER-190)
15) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2956: case inequality (!==) is not supported by synthesis. (VER-190)
16) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2956: case inequality (!==) is not supported by synthesis. (VER-190)
17) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2957: case inequality (!==) is not supported by synthesis. (VER-190)
18) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2957: case inequality (!==) is not supported by synthesis. (VER-190)
19) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2959: Syntax error at or near token '.'. (VER-294)
20) Error:  /home/inf2008/soukas/Desktop/project/src/usb_agent.v:2988: case inequality (!==) is not supported by synthesis. (VER-190)
21) Error:  Too many errors; can't continue. (VER-40)


##### LINKS FOR THE PROBLEMATIC VERILOG FILES #########

usb_test3.v : https://code.google.com/p/inf-uth-vlsi-group-1-spring2013/source/browse/usb2uart/trunk/verify/tests/usb_test3.v

usb_test2.v : https://code.google.com/p/inf-uth-vlsi-group-1-spring2013/source/browse/usb2uart/trunk/verify/tests/usb_test2.v

usb_test1.v : code.google.com/p/inf-uth-vlsi-group-1-spring2013/source/browse/usb2uart/trunk/verify/tests/usb_test1.v

usb_rx_phy.v : https://code.google.com/p/inf-uth-vlsi-group-1-spring2013/source/browse/usb2uart/trunk/rtl/usb1_phy/usb_rx_phy.v

usb_agent.v : https://code.google.com/p/inf-uth-vlsi-group-1-spring2013/source/browse/usb2uart/trunk/verify/agents/usb/usb_agent.v
Apr 17, 2013
#1 dine...@yagnainnovation.com
Hi

looks like your are trying synthesis Test bench file also. If you are trying synthesis using FPGA tools; then you can refer the RTL file list at 

usb2uart/trunk/verify/run/filelist_rtl.f

This file is newly added into SVN.  Once again checkout from the file.

OR Include following file:
+incdir+../../rtl/usb1_core \
../../rtl/usb1_core/usb1_core.v \
../../rtl/usb1_core/usb1_crc16.v \
../../rtl/usb1_core/usb1_crc5.v \
../../rtl/usb1_core/usb1_ctrl.v \
../../rtl/usb1_core/usb1_fifo2.v \
../../rtl/usb1_core/usb1_idma.v \
../../rtl/usb1_core/usb1_pa.v \
../../rtl/usb1_core/usb1_pd.v \
../../rtl/usb1_core/usb1_pe.v \
../../rtl/usb1_core/usb1_pl.v \
../../rtl/usb1_core/usb1_rom1.v \
../../rtl/usb1_core/usb1_utmi_if.v  \
../../rtl/usb1_phy/usb_phy.v \
../../rtl/usb1_phy/usb_rx_phy.v \
../../rtl/usb1_phy/usb_tx_phy.v \
../../rtl/lib/generic_fifo_sc_a.v \
../../rtl/lib/generic_dpram.v \
../../rtl/lib/sync_fifo.v \
../../rtl/lib/async_fifo.v \
../../rtl/uart_core/uart_core.v \
../../rtl/uart_core/uart_txfsm.v \
../../rtl/uart_core/uart_rxfsm.v \
../../rtl/uart_core/uart_cfg.v \
../../rtl/lib/clk_ctl.v \
../../rtl/lib/double_sync_high.v \
../../rtl/lib/double_sync_low.v \
../../rtl/lib/registers.v \
../../rtl/core/core.v     

Note: usb1_defines.v file is available inside ../../rtl/usb1_core directory.

-Dinesh Annayya