| Issue 3447: | VHDL syntax highlighting | |
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At the moment (gerrit 2.11.1), VHDL syntax highlighting is not supported by the change screen. Is there any chance that this will by integrated into gerrit at some point? If not, is there a way how we could extend gerrit to support VHDL syntax highlighting, e.g. by a plugin?
Jun 23, 2015
Project Member
#1
David.Os...@gmail.com
Status:
AwaitingInformation
Jun 24, 2015
As workaround for now you could use Unified diff view instead of SideBySide diff view.
Jul 10, 2015
I rewrote the VHDL mode and created a pull request to upstream CodeMirror: https://github.com/codemirror/CodeMirror/pull/3372 Hopefully it will be merged, and when Gerrit updates CodeMirror, we will support VHDL syntax highlighting.
Jul 10, 2015
Glad to hear!
Nov 6, 2015
(No comment was entered for this change.)
Status:
Submitted
Labels: FixedIn-2.12
Dec 21, 2015
(No comment was entered for this change.)
Status:
Released
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