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hmc-6502 - default

Source Commits


Commits

Author Date Commit Message
npinckney May 13, 2008 237 Moved memory writes to falling ph2 (instead of rising ph2) in mem.sv to match ac
twbarr Apr 30, 2008 236 updated diagrams.
twbarr Apr 28, 2008 235 cleaned up control.vsd a bit.
Kyle.L.Marsh Apr 28, 2008 234 Finished updating comments throughout all of /src and its subdirectories.
Kyle.L.Marsh Apr 28, 2008 233 Updated comments in the RTL (*.sv in /src). Still coming: comments in python co
HJustice@hmc.edu Apr 26, 2008 232 brk auto-generated, no hardware difference
twbarr Apr 26, 2008 231 refolded in reset changes for ROM testing, moved BRK to correct opcode, added RO
twbarr Apr 26, 2008 230 added first round of changes to ROM issues.
HJustice@hmc.edu Apr 25, 2008 229 backwards branches appear to work now
HJustice@hmc.edu Apr 25, 2008 228 fixed timing on some tests and added branch test
HJustice@hmc.edu Apr 25, 2008 227 test for different branch arithmetic
HJustice@hmc.edu Apr 24, 2008 226 ucasm.py now includes alu_op for ROL
HJustice@hmc.edu Apr 24, 2008 225 BRK mostly functional now
Kyle.L.Marsh Apr 19, 2008 224 Removed flag initialization from test06-addsub.sv.
Kyle.L.Marsh Apr 19, 2008 223 Removed regfile initialization from test06-addsub.sv.
HJustice@hmc.edu Apr 17, 2008 222 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 17, 2008 221 Suite A tests totally finished.
HJustice@hmc.edu Apr 17, 2008 220 added auto-generated stuff to repository
twbarr Apr 17, 2008 219 ALU modified to use external decoder.
twbarr Apr 17, 2008 218 changed set/clear flag method, ph0 = !ph1, removed forcible resets
twbarr Apr 17, 2008 217 added actual files for clock/test_structure.sv d'oh.
twbarr Apr 17, 2008 216 added clock generator
twbarr Apr 17, 2008 215 reset -> resetb
HJustice@hmc.edu Apr 17, 2008 214 chip dot notation & testbench timing
HJustice@hmc.edu Apr 16, 2008 213 got rid of repeated final states
HJustice@hmc.edu Apr 16, 2008 212 updated assembler and started eliminating redundant states
HJustice@hmc.edu Apr 15, 2008 211 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 15, 2008 210 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 15, 2008 209 Edited wiki page through web user interface.
Kyle.L.Marsh Apr 13, 2008 208 Removed *_zc and *_oc states from 6502.ucode. All tests still pass.
Kyle.L.Marsh Apr 13, 2008 207 Fixed instrtable.txt so all the tests pass with carry_select in the opcode_pla.
Kyle.L.Marsh Apr 13, 2008 206 Minor change to instrtable.txt
Kyle.L.Marsh Apr 13, 2008 205 Modified instrtable2opcodes.py to read carry select from instrtable.txt. Modifi
twbarr Apr 13, 2008 204 allowed carry_sel to come from opcode rom
HJustice@hmc.edu Apr 12, 2008 203 minor alu fix
Kyle.L.Marsh Apr 10, 2008 202 Fixed the return target in the RTI test and got RTI working in the microrocode a
HJustice@hmc.edu Apr 10, 2008 201 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 10, 2008 200 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 10, 2008 199 added test for rti
Kyle.L.Marsh Apr 10, 2008 198 Edited wiki page through web user interface.
Kyle.L.Marsh Apr 10, 2008 197 All tests pass. Realized we need to write a new test for Set/clear interrupt an
HJustice@hmc.edu Apr 10, 2008 196 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 10, 2008 195 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 10, 2008 194 rtl passes test10
HJustice@hmc.edu Apr 10, 2008 193 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 10, 2008 192 rtl passes test09 :-)
HJustice@hmc.edu Apr 10, 2008 191 test10 fixed
HJustice@hmc.edu Apr 10, 2008 190 fixed test 11
Kyle.L.Marsh Apr 10, 2008 189 Fixed overflow in ALU. Passes Powertest and tests 00-08.
twbarr Apr 10, 2008 188 added pathtest system
HJustice@hmc.edu Apr 10, 2008 187 alu change...
twbarr Apr 10, 2008 186 reset stack pointer on reset, moved branch_taken such that addition of states do
HJustice@hmc.edu Apr 10, 2008 185 removed repeated states
HJustice@hmc.edu Apr 10, 2008 184 Edited wiki page through web user interface.
Kyle.L.Marsh Apr 10, 2008 183 Modified test04's testbench to make it check after the appropriate amount of tim
HJustice@hmc.edu Apr 9, 2008 182 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 9, 2008 181 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 9, 2008 180 rtl passes suite A test03
HJustice@hmc.edu Apr 9, 2008 179 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 9, 2008 178 RTL passes suite A test02
HJustice@hmc.edu Apr 9, 2008 177 implemented Braly's aluop swap
Kyle.L.Marsh Apr 9, 2008 176 Major fix here: --changed ucasm.py to allow 6502.ucode to include a c_sel fi
Kyle.L.Marsh Apr 9, 2008 175 Edited wiki page through web user interface.
npinckney Apr 8, 2008 174 Updated dumpvar() in PowerTest.sv with core signals, for .VCD generation
Kyle.L.Marsh Apr 8, 2008 173 Edited wiki page through web user interface.
Kyle.L.Marsh Apr 8, 2008 172 Found the bug in 6502.ucode that was causing tests 00 and 01 to fail. Test 08 s
Kyle.L.Marsh Apr 8, 2008 171 Modified ucasm.py, instrtable.txt, and 6502.ucode to handle compares (not sure i
HJustice@hmc.edu Apr 4, 2008 170 not failing at commiting files
HJustice@hmc.edu Apr 4, 2008 169 a few minor things I forgot to commit last night
HJustice@hmc.edu Apr 3, 2008 168 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 3, 2008 167 suite A test08 passes! :-)
HJustice@hmc.edu Apr 3, 2008 166 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 3, 2008 165 suite A test05 passes! :-)
HJustice@hmc.edu Apr 3, 2008 164 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 3, 2008 163 Edited wiki page through web user interface.
HJustice@hmc.edu Apr 3, 2008 162 Created wiki page through web user interface.
Kyle.L.Marsh Apr 3, 2008 161 Committed aluSubTest files.
twbarr Apr 3, 2008 160 reverted alu update by KLM.
twbarr Apr 3, 2008 159 buffered p_sel
HJustice@hmc.edu Apr 3, 2008 158 more fixups
Kyle.L.Marsh Apr 3, 2008 157 Fixed subtraction in alu.sv -- it was b-a-c_in but should have been b-a-~c_in.
twbarr Apr 3, 2008 156 removed some of the control system latches
Kyle.L.Marsh Apr 3, 2008 155 Got FSM state acc working properly...also fixed a bug in the assembler. Next up:
HJustice@hmc.edu Apr 3, 2008 154 suite A test00 passes rtl :-)
HJustice@hmc.edu Apr 3, 2008 153 abs x/y writes work
HJustice@hmc.edu Apr 2, 2008 152 minor test00 (store) fixes
HJustice@hmc.edu Apr 2, 2008 151 suite A test01 passes rtl!
HJustice@hmc.edu Apr 2, 2008 150 indirect x reads now work :-)
Kyle.L.Marsh Apr 2, 2008 149 Got indirect_y addressing mode working in 6502.ucode.
HJustice@hmc.edu Apr 2, 2008 148 minor instrtable fixes
HJustice@hmc.edu Apr 2, 2008 147 scripts for all tests and other minor changes
HJustice@hmc.edu Mar 31, 2008 146 PLA verilog generate batch file
Kyle.L.Marsh Mar 31, 2008 145 Made my opcode_label2bin.py more robust so it handles the changed format of the
HJustice@hmc.edu Mar 31, 2008 144 automated control.sv
twbarr Mar 31, 2008 143 added automation for ucode compilation
HJustice@hmc.edu Mar 31, 2008 142 updated control
HJustice@hmc.edu Mar 31, 2008 141 updated control.sv
HJustice@hmc.edu Mar 30, 2008 140 suite a testbench fixes
twbarr Mar 30, 2008 139 moved flag masker from core to control. should have done that in the first place
Kyle.L.Marsh Mar 30, 2008 138 Modified indirect_y_write in 6502.ucode. Still doesn't work. I'm working out w