Project Goal: Get Theora streams decoded in real-time on a FPGA embedded system.


Today, the growing market of mobile devices dictates the success of a new multimedia application. Everybody wants to hear its preferred music or to see movies in any place. So, it is very important to have a system capable to decode real-time Theora streams in a mobile device.

Decoding a Theora stream requires an ammount of processing power that may not be avaiable in embedded systems. The design of a specific decoding hardware can be a feasible solution in this case. This work proposes a hardware implementation of a Theora decoder based on a software reference model.

The hardware implementation of the entire decoding algorithm is not necessary, there is a more elegant and flexible way to get a mobile device decoding Theora streams: implement only the highest cpu-time consuming parts of algorithm in hardware and the rest implement in software running in a small generic processor.

The proposed architeture uses the LEON (LGPL SPARC processor) with some hardware modules connected as peripheral to speed up the decoding process and permit the real-time decoding of Theora streams.


The full proposal text can be found at:
http://atlas.lsc.ic.unicamp.br/~portavales/wp-content/uploads/2006/05/soc_proposal.txt


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http://atlas.lsc.ic.unicamp.br/~portavales/?page_id=34