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ρ-VEX: A Reconfigurable and Extensible VLIW Processor

This is the project website for ρ-VEX, an open source VLIW processor with an accompanied development framework. The project started as the MSc project of Thijs van As.

About ρ-VEX

ρ-VEX is an open source reconfigurable and extensible Very-Long Instruction Word (VLIW) processor, accompanied by a development framework consisting of a VEX assembler, ρ-ASM. The processor architecture is based on the VEX ISA, as introduced by J.A. Fisher et al.. The VEX ISA offers a scalable technology platform for embedded VLIW processors, that allows variation in many aspects, including instruction issue-width, organization of functional units, and instruction set. The ρ-VEX source code is described in VHDL. ρ-ASM is written in C.

A software development compiler toolchain for VEX is made publicly available by Hewlett-Packard. The reasons VEX was chosen as the ISA are merely its extensibility and the quality of the available compiler. The design provides mechanisms that allow parametric extensibility of ρ-VEX. Both reconfigurable operations, as well as the versatility of VEX machine models are supported by ρ-VEX. The processor and framework are targeted at VLIW prototyping research and embedded processor design.

The name ρ-VEX stands for 'reconfigurable VEX' processor. Because the letter Rho (P or ρ) is the Greek analogous for the Roman R or r, ρ-VEX is pronounced as r-VEX. This is also the correct spelling when no Greek letters can be used (as is the case with the project website URL).

Getting Started

To start experimenting with ρ-VEX, read the QuickstartGuide and download the latest code snapshot, or checkout trunk. When you have a Xilinx University Program Virtex-II Pro Board by Digilent, you should have ρ-VEX running within moments.

Documentation

Contact Information

Thijs van As <t.vanas@gmail.com>
Computer Engineering Laboratory
Faculty of Electrical Engineering, Mathematics and Computer Science
Delft University of Technology
Delft, The Netherlands

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