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Updated Jan 25, 2007 by carlpny
Labels: Featured, Phase-Design
ProjectOverview  
An overview of the project as well as links to relevant documentation.

Introduction

For the Spring, 2007 semester, the VLSI class plans to develop a MIPS microprocessor. The processor will implement the MIPS R2000-class instruction set as well as utilize a cache memory system.

Project Design Proposal

The original proposal is available here.

Instruction Set

The list of implemented instructions and their development status is available here.

Development Documentation

Drawings


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