Introduction

GLE-MiPS is a VHDL description of a fully functiontial non-pipelined mips-like processor. It features a complete set of mathematical and logical operations over integer numbers, with the addition of two memory modules, RAM and ROM.

Features

This processor supports 32 bit operations:

• integer addition
• integer subtraction
• integer multiplication
• integer division
• integer modulo
• shift operation
• rotate operation
• bitwise operation
• branch computation

It features

• simple ROM architecture
• simple RAM architecture
• partial support to 64 bits operations

Future Features

• performance improvements
• better documentation
• some kind of compiler for its instruction set
• floating point operations

You can have a look at the general description of this processor, or read the relevant modules documentation:

1. InstructionFetch
2. InstructionDecode
3. ExecutionStage
4. MemoryStage
5. WriteBack
6. ControlUnit
7. ArithmeticLogicUnit

Screenshot

Disclaimer

Documentation applies for major releases only; changes performed in following revisions of the processor may not reflect anyomore what is described here. However whenever a new project is started or a major release is submitted, documentation will be completely updated.