More info about this project and VHDL/Verilog tutorials (http://www.tutoriaisengenharia.com)

This project is about the porting to FPGA of the Bill's Magic-1 computer (http://www.homebrewcpu.com/)

Some Bill's M1 photos:

Some Bill's videos:

The Image bellow helps understand the Magic-1 Architecture

This table will briefly describe each part.

Introduction

The Magic-1 computer is build with TTL devices(mostly 74LS, 74F and one 74 series). It uses a ported version of Minix 2 (2.04) build with lcc compiler retargeted to Magic-1.

The table bellow list some of key characteristcs:

Magic-1 is a microcoded computer it means that each of his 256 opcodes will point to some subroutine wich will actually perform all the operations regarding that opcode so each opcode will normally takes 5 or 6 microinstructions to be performed.

Magic-1 can be accessed with a telnet session. For access instructions visit http://www.homebrewcpu.com/

I will list a simple C program compiled with lcc, to check the conversion for Magic-1 Assembler.

int soma(int a, int b)
{
	return a+b;
}

int subtracao(int a, int b)
{
	return a-b;
}

unsigned char multiplicacao(int a, int b)
{
	return a * b;
}

int main(void)
{
	int a = 3;
	int b = 2;
	int c,d,f;
	unsigned char e;
	c = soma(a,b);
	d = subtracao(a,b);
	e = multiplicacao(a,b);
	return 0;
}

After compiling:

;	Magic-1 assembly file, generated by lcc 4.2

	.global _soma
	.cseg
_soma:
	ld.16	a,0+4+0(sp)
	add.16	a,2+4+0(sp)
L1:
	ret

	.global _subtracao
_subtracao:
	ld.16	a,0+4+0(sp)
	sub.16	a,2+4+0(sp)
L2:
	ret

	.global _multiplicacao
_multiplicacao:
	ld.16	a,0+4+0(sp)
	ld.16	b,2+4+0(sp)
	call	$muli16
	and.16	a,0xff
L3:
	ret

	.global _main
_main:
	enter	16
	ld.16	a,3
	st.16	-2+18(sp),a
	ld.16	a,2
	st.16	-4+18(sp),a
	ld.16	a,-2+18(sp)
	st.16	2(sp),a
	ld.16	a,-4+18(sp)
	st.16	4(sp),a
	call	_soma
	st.16	-6+18(sp),a
	ld.16	a,-2+18(sp)
	st.16	2(sp),a
	ld.16	a,-4+18(sp)
	st.16	4(sp),a
	call	_subtracao
	st.16	-8+18(sp),a
	ld.16	a,-2+18(sp)
	st.16	2(sp),a
	ld.16	a,-4+18(sp)
	st.16	4(sp),a
	call	_multiplicacao
	st.8	-9+18(sp),a
	ld.16	a,0
L4:
	leave
	ret

	.end

For more detailed information look in: http://www.homebrewcpu.com/technical_info.htm After that step a Magic-1 assembler was made using Lex and Yacc all sources will be avaible in Bill's Magic-1 page.

Hardware Tests

The main idea is to port the Control Card and Register/ALU Card, first, to an Xilinx Spartan3 starter kit, and then to some card to use directly to Magic-1.

To port other areas we will need a larger FPGA, and maybe will not be so cool. The first tests will be made with my Xilinx boards (Spartan 3A Starter Kit,Ml403)