| Projects on Google Code | Results 1 - 10 of 10 |
Code for senior project
Hatch is open source, extensible, and aimed at IC and FPGA designers.
Hatch uses a high level register interface description in Python to generate RTL (Verilog), XML, and various documentation formats including HTML and LaTex. This allows the documentation source code and register RTL to exist i...
http://www.inf.unisi.ch/postdoc/bruttomesso/imgs/small_header.gif
=Intro=
This page is the SVN *source code* repository for OpenSMT (click Source tab).
Quick tip: sources can be download with
`svn checkout http://opensmt.googlecode.com/svn/trunk/ opensmt`.
Also you need t...
SMT,
SAT,
bit-vectors,
arithmetic,
SMT-LIB,
SMTCOMP,
theory-solver,
formal-methods,
verification,
model-checking,
equality,
decision-procedures,
nelson-oppen,
boolean-abstraction,
RTL
The perl code (hdltags or vtags) creates tags for verilog/system verilog/vhdl code for browsing the code with functionalities similar to ctags
Current version supports Verilog and System-Verilog. VHDL would be supported soon!
Only module names are tagged.
Usual ctags commands work:
vi −t t...
A tool for convert arabic text in Flash CS3. Places string in correct order into selected TextField.
مووبل تايپ فارسی یک پروژه غیر انتفاعی است که با هدف کمک به توسعه زبان فارسی در وب راه اندازی شده است.
NOTE: As of today [17.02.08] I'll use this subversion Commitment for non-core codes only and i'll base the persian trunk in another subversion: http://code.google.com/p/modxrtl/
MODxRTL makes Right to Left needs available for right to left languages, specificaly for persian/farsi language users o...
*xregister* is a set of XML tools that automates _Configuration Register Module_ design and verification in SoC design. RTL, REF, RAL (_Register Abstract Level_), Doc, C Header, etc are generated to synchronize SW/HW co-design.
*xregister* is currently finished and used in real project, just [ht...
= Background =
C/C++ is the language for system engineers to develop the algorithm. VHDL/Verilog is the language for IC designers to develop the hardware. Normally, the C/C++ is translated to VHDL/Verilog by hand. This is tedious and error-prone process.
Although industry exists some tools, such a...
[http://i28.tinypic.com/2h7qgx0.jpg]
MODxRTL covers Right to Left issues for right to left languages, specialy for Persian language users of MODx content management system.
MODx RTL full package is available for download, to get the RTL optimized version of MODx navigate to the download sectio...