<img src="http://img22.imageshack.us/img22/2570/pianatop.png" /> <h1><font color="#888">P</font>rocessor <font color="#888">I</font>ndependent <font color="#888">A</font>rchitecture A<font color="#888">na</font>lyzer</h1> ---- == What's Piana? == Piana is a processor independent architecture s...

=Gestault: _A component-based framework for architectural simulation_= Author: Lewis Baumstark, Jr. ==Goals== Gestault is a framework for teaching computer-architecture-related concepts such as: * CPU's * Memory and cache organization * Buses It's goal is to provide a "drag and ...

MIPS-lite Simulator

MIPS/DLX processor in verilog. Student project.

Proof of concept project required by the "Computer architecture and design 2" course at the Faculty of Electrical Engineering, University of Belgrade. It's a complete and fully functional simulator for a CPU of certain architecture and design.

This is part of a graduate-level research project led by Kylan Robinson. It is a product of the High Performance Computing Systems research group at Washington State University (Dr. Jose Delgado-Frias, advisor). <wiki:gadget url="http://www.ohloh.net/projects/26841/widgets/project_factoids.xml" ...

This project aims to collaborate on experimental multicore innovation with the m5 simulator.

Simulador de um processador da arquitetura uRISC, de 16 bits.

I am creating this project to put in a host the our personal files, in this way all components will not be depend of a host in the house of a friend. :P

Core for Practice totaly simple and practical processor including BCD Instruction